1. Field of the Invention
The present invention relates to a power conversion apparatus for use in an uninterruptive power supply apparatus (hereinafter abbreviated to a "UPS"), a fuel cell generating system, an active filter or a VVVF.
2. Description of the Related Art
FIG. 10 is a block diagram which illustrates a power conversion apparatus disclosed in, for example, Japanese Patent Application No. 1-211737. Referring to FIG. 10, reference numeral 1 represents a DC power source, 2 represents an inverter circuit and 3 represents a transformer the input terminal of which is connected to the inverter circuit 2. Reference numeral 4 represents a cyclo converter circuit connected to the output terminal of the transformer 3. Reference numeral 5 represents a filter circuit connected to the output terminal of the cyclo converter circuit 4. Reference numeral 6 represents a load circuit connected to the output terminal of the filter circuit 5. Reference numeral 10 represents a carrier signal generating circuit, 11a represents an inverter control circuit, 12 represents an output voltage command generating circuit for processing a command of an output voltage or an output current transmitted from the cyclo converter 4 and 13a represents a cycle converter control circuit.
FIG. 11 illustrates the detailed structures of the inverter circuit 2, the transformer 3 and the cyclo converter circuit 4. The inverter circuit 2 comprises semiconductor switching devices S.sub.1 to S.sub.4 composed of transistors, MOSFETs or the like and diodes D.sub.1 to D.sub.4 which are respectively, in an anti-parallel manner, connected to the corresponding semiconductor switching devices S.sub.1 to S.sub.4. The transformer 3 has a primary coil which is connected to the inverter circuit 2 and as well has a secondary coil which is connected to the cyclo converter circuit 4. The cyclo converter circuit 4 comprises semiconductor switching devices S.sub.5 to S.sub.8 and S.sub.5A to S.sub.8A composed of transistors, MOSFETs or the like and diodes D.sub.5 to D.sub.8 and D.sub.5A to D.sub.8A which are respectively, in an anti-parallel manner, connected to the corresponding switching devices S.sub.5 to S.sub.8 and S.sub.5A to S.sub.8A. The two semiconductor switching devices S.sub.n and S.sub.nA (n=5 to 8) and two diodes D.sub.n and D.sub.nA (n=5 to 8) connected to the same in the anti-parallel manner constitute a bidirectional switch Q.sub.n which is capable of controlling the power supply direction.
As shown in FIG. 12, the inverter control circuit 11a comprises a 1/2 divider 100 which transmits an output signal, the polarity of which is inverted in synchronization with the last transition of an input signal, and a NOT circuit 101 connected to the 1/2 divider 100. The inverter control circuit 11a transmits drive signals T.sub.1 to T.sub.4 to the inverter circuit 2, the switching signals T.sub.1 to T.sub.4 being signals for switching on/off the switching devices S.sub.1 to S.sub.4 of the inverter circuit 2.
FIG. 13 illustrates the detailed structure of the cyclo converter control circuit 13a which comprises an absolute value circuit 102, a comparator 103, NOT circuits 105, 106, 108 and 110, 1/2 dividing circuits 104 and 107, a polarity discriminating circuit 109, AND circuits 111 to 118 and OR circuits 119 to 122. The cyclo converter control circuit 13a transmits drive signals T.sub.5 to T.sub.8 which are signals for switching on/off switches Q.sub.5 to Q.sub.8 of the cyclo converter circuit 4.
Then, the operation of the above-described conventional apparatus will now be described with reference to a timing chart shown in FIG. 14. First, a sawtooth shape carrier signal V.sub.p facing an upper right direction is transmitted from the carrier signal generating circuit 10. Then, drive signals T.sub.1 to T.sub.4, the duty ratio of each of which is 50%, are, due to the following operations, transmitted from the inverter control circuit 11a shown in FIG. 12: when the carrier signal V.sub.p is supplied, signal Tx, which synchronizes with the signal V.sub.p and which is halved, is transmitted from the 1/2 divider 100. Furthermore, the NOT circuit 101 transmits signal T.sub.y which is a signal obtainable by inverting the sign of the signal T.sub.x. As a result, the signal T.sub.x is, as the drive signals T.sub.1 and T.sub.4, transmitted to the inverter circuit 2. Furthermore, the signal T.sub.y is, as the drive signals T.sub.2 and T.sub.3, transmitted to the same. When the level of each of the drive signals T.sub.1 to T.sub.4 is high, the corresponding switching devices S.sub.1 to S.sub.4 of the inverter circuit 2 are switched on, while the same are switched off when the above-described level is low. Furthermore, the relationship between the switching on/off operations of the semiconductor switching devices S.sub.1 to S.sub.4 and the secondary voltage V.sub.2 of the transformer 3 shown in FIG. 11 can be expressed as follows: EQU When the switches S.sub.1 and S.sub.4 are switched on: V.sub.2 =V.sub.dc EQU When the switches S.sub.2 and S.sub.3 are switched on: V.sub.2 =-V.sub.dc ( 1)
where symbol V.sub.dc denotes the output voltage from the DC power source 1
Therefore, the secondary voltage V.sub.2 becomes a rectangular wave voltage the duty ratio of which is 50% as shown in FIG. 14.
On the other hand, the output voltage command generating circuit 12 transmits output voltage command signal V.sub.cc * which instructs the output voltage to be transmitted from the cyclo converter 4, the output voltage command signal V.sub.cc * being, together with the carrier signal V.sub.p, supplied to the cyclo converter control circuit 13a. The cyclo converter control circuit 13a receives the above-described signals so as to transmit the drive signals T.sub.5 to T.sub.8 the pulse width of each which has been modulated as follows. Referring to FIG. 13, the output voltage command signal V.sub.cc * is converted into absolute signal .vertline.V.sub.cc *.vertline. by the absolute value circuit 102. The absolute signal .vertline.V.sub.cc *.vertline. is, together with the carrier signal V.sub.p, supplied to the comparator 103. The comparator 103 transmits signal T.sub.p shown in FIG. 14, the signal T.sub.p being then supplied to the 1/2 divider 104 in which the signal T.sub.p is converted into signal T.sub.a. On the other hand, when the signal T.sub.p is supplied to the 1/2 divider 107 after the sign of it has been inverted by the NOT circuit 106, signal T.sub.b formed into the same wave shape as that of the signal T.sub.x is transmitted. Furthermore, when the signal T.sub.a is supplied to the NOT circuit 105, signal T.sub.c is transmitted, while when the signal T.sub.b is supplied to the NOT circuit 108, signal T.sub.d formed into the same wave shape as that of the signal T.sub.y is transmitted.
Then, the relationship between the signals T.sub.a to T.sub.d and output voltage V.sub.cc from the cycle converter circuit 4 will now be described. In a case where there is a desire to make the polarity of the output voltage V.sub.cc to be positive, the drive signals T.sub.5 to T.sub.8 are determined in accordance with the following equations: EQU T.sub.5 =T.sub.a, T.sub.6 =T.sub.d, T.sub.7 =T.sub.c, T.sub.8 =T.sub.b ( 2)
In response to the above-described drive signals T.sub.5 to T.sub.8, the switch Q.sub.n (n=5 to 8) which constitutes the bidirectional switch is switched on/off. As a result, the output voltage V.sub.cc from the cyclo converter circuit 4 is controlled. The fact that the switch Q.sub.n is switched on/off means a fact that the switching devices S.sub.n and S.sub.nA are simultaneously switched on/off. The relationship between the switching on/off operation performed by the switch Q.sub.n (n=5 to 8) and the above-described output voltage V.sub.cc is expressed by the following equations: EQU When switches Q.sub.5 and Q.sub.8 are switched on: V.sub.cc =V.sub.2 EQU When switches Q.sub.6 and Q.sub.7 are switched on: V.sub.cc =-V.sub.2 EQU When switches Q.sub.5 and Q.sub.6 are switched on: V.sub.cc =0 (3) EQU When switches Q.sub.7 and Q.sub.8 are switched on: V.sub.cc =0
Therefore, the following facts can be deduced from Equations (2) and (3): when the levels of each of the signals T.sub.a and T.sub.b is high in FIG. 14, the relationship V.sub.cc =V.sub.2 is held, when the levels of each of the signals T.sub.c and T.sub.d is high, the relationship V.sub.cc =-V.sub.2 is held. When the levels of each of the signals T.sub.a and T.sub.d or the signals T.sub.b and T.sub.c are high, the relationship V.sub.cc =0 is held. Therefore, the output voltage V.sub.cc from the cyclo converter circuit 4, as shown in FIG. 14, becomes positive voltage the pulse width of which has been modulated. In a case where there is a desire to make the polarity of the output voltage V.sub.cc to be negative, the drive signals T.sub.5 to T.sub.8 may be determined in accordance with the following equations: EQU T.sub.5 =T.sub.c, T.sub.6 =T.sub.b, T.sub.7 =T.sub.a, T.sub.8 =T.sub.d ( 4)
Then, the description about the operation shown in FIG. 13 will now be continued. The polarity discriminating circuit 109 transmits polarity signal V.sub.sgn denoting the polarity of the output voltage command signal V.sub.cc *. The NOT circuit 110 transmits a signal which is a signal obtainable by inverting the sign of the polarity signal V.sub.sgn. The above-described signals and the signals T.sub.a to T.sub.d are, via the AND circuits 111 to 118, supplied to the OR circuits 119 to 122. When the polarity of the output voltage command signal V.sub.cc * is positive, the signals T.sub.a, T.sub.c, T.sub.d and T.sub.b are transmitted from the AND circuits 111, 114, 116 and 117, respectively. Therefore, the drive signals T.sub.5 to T.sub.8 in accordance with Equation (2) are transmitted to the switches Q.sub.5 to Q.sub.8 of the cyclo converter circuit 4. Similarly, when the polarity of the output voltage command signal V.sub.cc * is negative, the drive signals T.sub.5 to T.sub.8 in accordance with Equation (4) are transmitted to the switches Q.sub.5 to Q.sub.8. As a result of the above-described operations, the voltage V.sub.cc, the wave form of which is obtainable by modulating the pulse width of the AC output voltage command signal V.sub.cc * transmitted from the output voltage command generating circuit 12, is transmitted from the cyclo converter circuit 4. In this state, the PWM operation can be performed similarly by a method arranged in such a manner that the output current transmitted from the cyclo converter circuit 4 is detected and the switch Q.sub.n (n=5 to 8) of the cyclo converter circuit 4 is switched in a single direction in accordance with the polarity of the output current as follows:
when the polarity of the electric current is positive: EQU S.sub.5 =T.sub.5, S.sub.6 =T.sub.6, S.sub.7 =T.sub.7, S.sub.8 =T.sub.8 ( 5)
All of switches S.sub.5A to S.sub.8A are switched off
When the polarity of the electric current is negative:
All of switches S.sub.5 to S.sub.8 are switched off EQU S.sub.5A =T.sub.5, S.sub.6A =T.sub.6, S.sub.7A =T.sub.7, S.sub.8A =T.sub.8 ( 6)
Furthermore, the output from the cyclo converter circuit 4 is supplied to the load circuit 6 after the high frequency component of the output voltage V.sub.cc has been removed by the filter circuit 5.
The conventional power conversion apparatus has been constituted as described above in such a manner that it receives the DC power and temporarily converts it into a high frequency AC so as to transmit AC power which corresponds to the output voltage command signal by using the high frequency AC power. Since high frequency electric power is transmitted/received via a transformer in a DC-AC power conversion apparatus of the type described above, it is usually called a "high frequency intermediate link type power conversion apparatus". Furthermore, the frequency of the electric power which is caused to pass through the transformer as described above is called a "link frequency". By employing the above-described high frequency intermediate link method, the frequency of the electric power which passes through the insulating transformer can be raised to a level which is several tens of times of the output frequency. Therefore, the size and the weight of the transformer can be reduced. However, in a case where the above-described method is employed in a large-capacity power conversion apparatus, the link frequency must, in fact, be lowered in inverse proportion to the capacity in order to overcome a problem in that it is very difficult to construct both a high frequency and large capacity transformer. The conventional structure constituted as shown in FIG. 10 is arranged in such a manner that the link frequency and the PWM frequency is made to be 1:2. Therefore, the conventional structure encounters a problem in that the PWM frequency of the cyclo converter is lowered in proportion to the link frequency and thereby the controllability of the output voltage waveform of the power converter deteriorates and as well as the size of the filter circuit cannot be reduced.